PURPOSE: To improve the operability, by counting the time of program execution status with a timer mechanism, by providing the timer mechanism made possible for program control and giving a start, stop and reset instruction to the timer mechanism.

CONSTITUTION: Timers T1WT3 consisting of programmable counters are provided and a write signal, an address selection signal and a synchronizing signal from a CPU are applied to an AND gate A1 to output the write signal and the address selection signal when a synchronizing clock goes to H level. This output is inputted to registers R1WR6, one of the registers R1WR7 designated at the selection signal is made effective and the output is inputted to the timers T1 and T2. The start, stop and reset instructions of the timer mechanism are given to the timers T1WT3, which count the time of program execution status and the result is applied to a multiplexer M to improve the operability of the program execution status measuring system.