Title:
MEMORY ACCESS METHOD AND APPARATUS FOR MULTIPLE PROCESSOR SYSTM
Document Type and Number:
Japanese Patent JPS60237567
Kind Code:
A
Abstract:
A multiprocessor data processing system in which a number of independent processors can concurrently operate on a shared memory even when one processor is performing a read-modify-write (RMW) operation, the system having a locking, content-associative write buffer and a controller for identifying RMW requests, for addressing the buffer and, for issuing directives to lock the buffer, to validate particular data blocks in the buffer and to transfer data back and forth between the processors, the memory and the buffer.
Inventors:
POORU KEI RODOMAN
JIYOZEFU ERU AADEINI JIYUNIA
DEIBITSUDO BII PAPUWAASU
JIYOZEFU ERU AADEINI JIYUNIA
DEIBITSUDO BII PAPUWAASU
Application Number:
JP2212185A
Publication Date:
November 26, 1985
Filing Date:
February 08, 1985
Export Citation:
Assignee:
PURAIMU COMPUTER INC
International Classes:
G06F12/00; G06F12/08; G06F15/16; G06F12/084; G06F15/177; (IPC1-7): G06F13/18; G06F15/16
Attorney, Agent or Firm:
Motohiro Kurauchi