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Patent Searching and Data


Title:
MEMORY CONTROLLER, MEMORY SYSTEM, AND MEMORY CONTROL METHOD
Document Type and Number:
Japanese Patent JP2008009614
Kind Code:
A
Abstract:

To provide a memory controller for efficiently correcting the error of storage data to be moved.

An error block management means 37 prepares an error block table for specifying a physical block storing data including at least a predetermined number of errors, and determines whether or not the physical block storing the data to be moved are stored is a physical block storing data including at least the predetermined number of errors by data movement processing to be executed according to writing processing based on instruction information from a host system 4. When the data including at least the predetermined number of errors are stored in the physical block, a control part 35 executes error correction processing serving also as data movement processing, and when the data including at least the predetermined number of errors are not stored in the physical block, the control part 35 executes the data movement processing by copy-back processing without any error correction.


Inventors:
TERASAKI YUKIO
Application Number:
JP2006178179A
Publication Date:
January 17, 2008
Filing Date:
June 28, 2006
Export Citation:
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Assignee:
TDK CORP
International Classes:
G06F12/16
Domestic Patent References:
JPH05282889A1993-10-29
JP2003186758A2003-07-04
JP2005078378A2005-03-24
Attorney, Agent or Firm:
Keiichi Yamamoto
Takashi Sakamoto