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Title:
MEMORY CONTROLLER
Document Type and Number:
Japanese Patent JPH06161908
Kind Code:
A
Abstract:

PURPOSE: To prevent the malfunctions of a system despite the abnormality produced at a part of the data stored in a backup RAM by providing a deciding means which decides the power voltage for backup and a memory control means which sets the data stored in a memory means to an initial state when the backup power voltage is not normal.

CONSTITUTION: A power supply 4 is turned on and a system starts. Thus a CPU 8 outputs the voltage value stored in a memory 8a to a CPU 1. Then the CPU 1 compares the received voltage value with the normal value set previously to decide whether the voltage of a backup battery 5 is normal or not. If not, the CPU 1 controls a memory controller 2 to clear all data stored in a backup RAM 3. In such a manner, all data stored in the RAM 3 are cleared when the battery 5 has a fault. Thus it is possible to prevent the CPU 8 from using the abnormal data and therefore to surely prevent the malfunctions of a system.


Inventors:
SEO SHIGETOSHI
Application Number:
JP31829192A
Publication Date:
June 10, 1994
Filing Date:
November 27, 1992
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
G06F12/16; (IPC1-7): G06F12/16
Attorney, Agent or Firm:
Takehiko Suzue



 
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