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Patent Searching and Data


Title:
MEMORY DATA CONTROLLER
Document Type and Number:
Japanese Patent JP3629929
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To accurately destroy the data of an RAM inside a device even in the case that the device is intentionally destroyed by a third person.
SOLUTION: This device is provided with a terminal having an RAM 4 in which storage data are backed-up by the power source of a battery 25, door 2 provided in a case of the terminal and a mechanical switch SW linked with the opening and closing of the door. Further, this device is provided with an optical sensor SR provided inside the case for inputting an optical signal from the outside of the case and outputting it as an electric signal in the case of making the data of the RAM in an unavailable state at the time of detecting the opening of the door, a clock generating part 21 for outputting a clock at the time of detecting the output of one of the mechanical switch and the optical sensor, a counter 22 for counting the clock and as transistor 27 for short- circuiting between the battery backup power source terminals of the RAM based on the count output of the counter.


Inventors:
Yasuhisa Oshima
Yasuyuki Hirose
Application Number:
JP33970597A
Publication Date:
March 16, 2005
Filing Date:
December 10, 1997
Export Citation:
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Assignee:
Saxa Co., Ltd.
International Classes:
G06F12/14; G06F21/75; G06F21/86; (IPC1-7): G06F12/14
Domestic Patent References:
JP60157648A
JP8161232A
JP61120957U
Attorney, Agent or Firm:
Masaki Yamakawa
Hiroro Kurokawa
Shigeki Yamakawa
Masayuki Konno
Osamu Nishiyama