Title:
メモリ素子及びその製造方法
Document Type and Number:
Japanese Patent JP7236254
Kind Code:
B2
Abstract:
A memory device includes cell transistors on active regions defined by a device isolation layer on a substrate such that each cell transistor has a buried cell gate and a junction portion adjacent to and at least partially distal to the substrate in relation to the buried cell gate, an insulation pattern on the substrate and covering the cell transistors and the device isolation layer, and a bit line structure on the insulation pattern and connected to the junction portion. The bit line structure includes a buffer pattern on the pattern and having a thermal oxide pattern, a conductive line on the buffer pattern, and a contact extending from the conductive line to the junction portion through the buffer pattern and the insulation pattern.
More Like This:
| WO/2024/066144 | SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR |
| JP7326544 | semiconductor equipment |
| WO/2024/062539 | MEMORY DEVICE USING SEMICONDUCTOR ELEMENT |
Inventors:
Hong Jinwoo
Lee Young Ju
Choi Joon-yong
金 廷▲ひょん▼
Sangjun Lee
Hyun Gyu Lee
Zhao Yun-cheol
Park Je-min
Ban Kotong
Lee Young Ju
Choi Joon-yong
金 廷▲ひょん▼
Sangjun Lee
Hyun Gyu Lee
Zhao Yun-cheol
Park Je-min
Ban Kotong
Application Number:
JP2018210364A
Publication Date:
March 09, 2023
Filing Date:
November 08, 2018
Export Citation:
Assignee:
Samsung Electronics Co.,Ltd.
International Classes:
H10B12/00; H10B63/10; H10N70/20
Domestic Patent References:
| JP2012156451A |
Foreign References:
| US20120091532 | ||||
| US20100327346 |
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Shinsuke Onuki
Tadahiko Ito
Shinsuke Onuki
Previous Patent: Information processing method and learning model
Next Patent: HYDRO-ELECTRIC POWER GENERATION SET
Next Patent: HYDRO-ELECTRIC POWER GENERATION SET