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Title:
MEMORY DEVICE
Document Type and Number:
Japanese Patent JP3958185
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To provide a memory device of which a state of a terminal can be varied in an optimum state in accordance with variation of process, voltage, and temperature.
SOLUTION: This device is provided with terminals comprising variable resistor circuits respectively and passing through external signals for operating memory devices respectively, and a control circuit outputting a control signal controlling a resistance value included in the variable resistor circuit in accordance with a command enable-signal indicating activation of auto-refresh operation of a memory device and an external enable-signal for activating a delay synchronism loop circuit. After a state of a terminal is changed to an optimum state by a control signal, the delay synchronism loop circuit is enabled, also, a state of a terminal is changed to an optimum state by a control signal while the memory device performs auto-refresh operation periodically. Therefore, as an external signal is received after a terminal state is changed to an optimum state in accordance with process, voltage, and temperature, input/output characteristics of the memory device can be improved. Also, as a terminal state is optimized using the existing instruction being not a newly added instruction, performance of the memory device can be improved.


Inventors:
Zhang Xinzhen
Application Number:
JP2002307089A
Publication Date:
August 15, 2007
Filing Date:
October 22, 2002
Export Citation:
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Assignee:
Samsung Electronics Co.,Ltd.
International Classes:
G11C11/409; G11C11/4093; G11C7/10; G11C7/22; G11C8/00; G11C11/4076; (IPC1-7): G11C11/409
Domestic Patent References:
JP6125261A
JP8162930A
JP2001060391A
JP2001118385A
JP11074776A
Attorney, Agent or Firm:
Yasunori Otsuka
Shiro Takayanagi
Yasuhiro Otsuka
Shuji Kimura