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Patent Searching and Data


Title:
MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS6143345
Kind Code:
A
Abstract:

PURPOSE: To decrease greatly the number of data lines set between a processor and a memory device by delivering the read data obtained by reading out a memory after adding the lead information to the read data.

CONSTITUTION: The token to be supplid is equal to either one of four types of tokens shown in a table. Both the instruction code and the register number of the supplied token are given to a decoder 12 via a bus 101. The decoder 12 produces signals for execution of various actions from the supplied code and number. Then the register number is set at "0" or "1" when the instruction code is equal to "10", and a latch signal 208 or 209 is activated. Then an extended address register 17 or 18 latches the data part of the token supplied via a bus 102. When the instruction code is equal to "11", a write data register 15 or 16 latches the data part of the token.


Inventors:
OUCHI MITSUO
Application Number:
JP16527284A
Publication Date:
March 01, 1986
Filing Date:
August 07, 1984
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F15/82; G06F9/44; G06F12/00; G06F12/02; (IPC1-7): G06F9/44
Attorney, Agent or Firm:
Shin Uchihara