PURPOSE: To simplify the device and to extend the backup time of an SRAM or the like by connecting a low active reset signal from a power supply voltage monitor device to the input terminal of the SRAM and simultaneously connecting a high resistor for pull-down so that this input terminal can be stablized at a ground level in the case of power failure.

CONSTITUTION: The low active reset signal is sent from a power supply voltage monitor device 4 to the input terminal of a chip select signal CE of an SRAM 3, a high resistor R2 for pull-down is connected so that the CE input terminal of the SRAM 3 can be stablized at the ground level in the case of power failure, and a resistor R1 is provided to supply a current to a reset line during a system operation. Thus, a gate IC constituting a chip select signal generator can be omitted, the device can be simplified, and the backup time of the memory cell such as the SRAM can be extended.