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Title:
MEMORY PROTECTING CIRCUIT
Document Type and Number:
Japanese Patent JPH0266655
Kind Code:
A
Abstract:

PURPOSE: To realize a quick rise of a system by preparing a RAM backed up by a battery or a nonvolatile RAM in addition to a RAM which receives a writing action with an instruction of a microprocessor and writing the initialization value also into the backed-up RAM or the nonvolatile RAM.

CONSTITUTION: An RS flip-flop 10 connected to a push-button switch 9 for start instruction of initialization is prepared together with an AND gate 11, a RAM 12 backed up by a battery, etc. The power supply voltage Vcc is applied to a power supply terminal Vcc from a battery 13. The terminal Vcc is connected to a microprocessor 1 via a data bus D and an address bus AD. A read instruction line -RD is connected to a read input -RD. The signal of a write instruction line -WR is inverted through an inverter 11b and connected to the input of the other side of an AND gate 11a and then connected to the write input -WR of the RAM 12 through an inverter 11c. The RAM 12 stores the same initialization value as a RAM 3. The storage value of the RAM 12 is not destroyed despite the runaway of the microprocessor 1.


Inventors:
KOBAYASHI YOSHINOBU
Application Number:
JP21945288A
Publication Date:
March 06, 1990
Filing Date:
August 31, 1988
Export Citation:
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Assignee:
SUMITOMO ELECTRIC INDUSTRIES
International Classes:
G06F12/14; G06F21/60; G06F21/62; G06F21/79; (IPC1-7): G06F12/14
Attorney, Agent or Firm:
Shigeki Kawase



 
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