Title:
MEMORY PROTECTION DEVICE
Document Type and Number:
Japanese Patent JPS51124332
Kind Code:
A
Abstract:
PURPOSE: To prevent any memory destruction by using AND of the read-out and load completion signal and power supply off signal from the memory.
Inventors:
OONO IKUZOU
TAKEGAWA TOORU
TOYAMA HISAO
OKA MINORU
TAKEGAWA TOORU
TOYAMA HISAO
OKA MINORU
Application Number:
JP4999275A
Publication Date:
October 29, 1976
Filing Date:
April 23, 1975
Export Citation:
Assignee:
OMRON TATEISI ELECTRONICS CO
International Classes:
G06F12/16; G06F1/00; G06F1/26; G06F1/30; G06F11/00; G06F13/00; G11C29/00; (IPC1-7): G06F1/00; G06F11/00; G06F13/00; G11C29/00
Domestic Patent References:
| JP41010649A | ||||
| JP43015100A | ||||
| JP44004134A | ||||
| JPS4936763A | 1974-04-05 |