Title:
MEMORY SYSTEM, AND CONTROL METHOD OF MEMORY SYSTEM
Document Type and Number:
Japanese Patent JP2019053806
Kind Code:
A
Abstract:
To provide a memory system and a control method of the memory system which appropriately reads data from each memory cell.SOLUTION: According to one embodiment, in a memory system, a controller performs a first read process, a second read process, and a third read process. The first read process is a process of reading data at a first read voltage. The second read process is a process of reading data at a second read voltage. The second read voltage is a voltage obtained by shifting the first read voltage by a first shift amount. The first shift amount is a shift amount determined according to a bit count value. The bit count value is a value obtained by counting the number of predetermined bit values in the data read in the first read process. The third read process is a process for alternatively executing a plurality of times shifting and setting the read voltage by the second shift amount and reading data with the read voltages set from the plurality of memory cells.SELECTED DRAWING: Figure 1
Inventors:
SATO NOBUAKI
Application Number:
JP2017178094A
Publication Date:
April 04, 2019
Filing Date:
September 15, 2017
Export Citation:
Assignee:
TOSHIBA MEMORY CORP
International Classes:
G11C16/04; G11C11/56; G11C16/08; G11C16/26
Attorney, Agent or Firm:
Sakai International Patent Office