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Title:
MEMORY SYSTEM HAVING PREFETCH MECHANISM AND METHOD FOR OPERATING THE SYSTEM
Document Type and Number:
Japanese Patent JP2001166989
Kind Code:
A
Abstract:

To provide a prefetch mechanism for realizing the proper prefetch of a data object by increasing hardware in a small extent, and suppressing the increase of the program size.

In this prefetch mechanism in which a hardware technique is combined with a software technique for quickening an application including a large data object, a compiler starts the prefetch operation by indicating the details of the data object to hardware. The hardware stores the values of these that is, the start address, element size, stride, start interval, and the number of elements of the data object. Once started by software, the hardware controls the prefetch of the hardware object to a prefetch buffer until the prefetch of all the objects is ended. At the same time, an application fetches already available data by performing access to a second level cache and the prefetch buffer in parallel.


Inventors:
MENSER OSCAR
TARUI TOSHIAKI
FUJII KEIMEI
Application Number:
JP34702199A
Publication Date:
June 22, 2001
Filing Date:
December 07, 1999
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G06F12/08; G06F9/38; G06F9/45; (IPC1-7): G06F12/08; G06F9/38
Attorney, Agent or Firm:
Sakuta Yasuo