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Title:
METAL WIRING STRUCTURE AND ITS FORMATION
Document Type and Number:
Japanese Patent JP3049487
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To obtain a metal wiring structure which increases the parasitic capacitance, by which the diffusion of Cu is suppressed with good efficiency and with increases the reliability of an element, by a method wherein a part of an insulating film adjacent to a conductive line is changed into a denatured layer by increasing a density or by implanting impurities.
SOLUTION: A trench 12 is formed on a semiconductor substrate on which an insulating film such as a silicon oxide film 11 or the like is formed, and a gas such as BH3, PH3, SiH4, Si2H6 or the like is injected into the silicon oxide film 11 together with a carrier gas. As a result, the density of the silicon oxide film 11 is increased, a part of the silicon oxide film 11 is changed into a substance which prevents the diffusion of Cu, and a denatured layer 13 is formed. Then, a conductive substance layer 14 is formed and etched back to form a conductive line. In this manner, since an element such as P, Si, N or the like is injected in a process to form metallic interconnection, Cu atoms or ions which are diffused from a Cu film are changed into a compound such as Cu3P, Cu3Si or an axide, and the diffusion of the Cu is suppressed. Consequently, the reliability of an element can be increased.


Inventors:
Yong Gonu Jung
Application Number:
JP2447297A
Publication Date:
June 05, 2000
Filing Date:
January 24, 1997
Export Citation:
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Assignee:
Ergi Semicon Company Limited
International Classes:
H01L21/31; H01L21/265; H01L21/3205; H01L21/768; H01L23/522; H01L23/532; (IPC1-7): H01L21/768; H01L21/265; H01L21/31
Domestic Patent References:
JP3289156A
JP613381A
JP851108A
JP6169019A
JP7307338A
Attorney, Agent or Firm:
Masaki Yamakawa