Title:
METHOD FOR ACCESSING MICROKERNEL AND AGENT OF PROCESSING UNIT
Document Type and Number:
Japanese Patent JP3692362
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To enable a microkernel to appear to simultaneously share physical address space "on the fly, "without need for temporary storage or wasted processor time, and in a cache coherent environment.
SOLUTION: A microkernel memory reference is traditionally required to refer to memory by exact physical address on a common base node. In this method, identification is made by recognizing the reference to a memory node (00), address spaces 101-1, 102-1, 103-1 reserved for a microkernel reference, or the like on the memory node (01) or the like. Such identification is performed "on the fly" by analysis of the condition of bits (301, 302, 303) in the physical address to which the access is directed. An identified node ID of the microkernel memory reference is translated to the node ID of a local node (310, 311). Then the microkernel reference can be treated like any other normal globally shared memory reference 309. Maintenance of cache coherency is facilitated by reverse-mapping (401-407) performed in accordance with a coherency request.
Inventors:
Tony M. Brewer
Kenice Chanei
Roger Sunshine
Kenice Chanei
Roger Sunshine
Application Number:
JP2003367187A
Publication Date:
September 07, 2005
Filing Date:
October 28, 2003
Export Citation:
Assignee:
HEWLETT-PACKARD COMPANY
International Classes:
G06F15/167; G06F12/02; G06F12/06; G06F12/08; G06F15/17; G06F15/177; (IPC1-7): G06F12/02; G06F12/06; G06F12/08; G06F15/17
Domestic Patent References:
JP2244253A | ||||
JP59121455A | ||||
JP8030568A | ||||
JP7210520A | ||||
JP62032555A | ||||
JP57060450A |
Other References:
A. Cox, R. Fowler著,The Implementation of a Coherent Memory Abstraction on a NUMA Multiprocessor:Experiences withPLATIUM,Proceedings of the 12th ACM Symposium on Operating Systems Principles,米国,ACM,1989年,p.32-44
Attorney, Agent or Firm:
Satoshi Furuya
Takahiko Mizobe
Takahiko Mizobe
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