To perform normally calibration in an enable state so that the current status is matched to compensation therefor, in a method of calibrating a driver and ODT impedance of a synchronous memory apparatus.
The impedance calibration method is provided with (a) a calibration enable signal generating process showing entry to a calibration operation mode, (b) a process in which a code signal for ODT calibration is successively generated for every predetermined time interval. (c) a process in which a first control signal generated based on the calibration enable signal is generated, and (d) a process in which a final code signal is latched out of code signals generated successively by the first control signal and used as driver and ODT impedance calibration signals. Control signals for calibrating impedance are controlled in all levels step by step and increase and decrease of impedance of an output driver and impedance of an ODT apparatus are stabilized, then, calibration by variation of temperature and voltage is achieved.
| JP2001344966 | SEMICONDUCTOR MEMORY |
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| JPH06105548 | [Title of Invention] Dynamic semiconductor storage device |
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Takeshi Sugiyama
Inoue Shinji