Title:
METHOD AND CIRCUIT FOR GENERATING INTEGRATED VALUE AND PERIOD FUNCTION
Document Type and Number:
Japanese Patent JP2002182898
Kind Code:
A
Abstract:
To provide the generating method and the generating circuit of a period function, which can generate the period function maintaining the continuity of a phase while an error is suppressed to be minimum.
At the time of integrating a unit value (u) and generating an integrated value Σu in a digital circuit, values A, B and C when u=A+C/B (B>C) is satisfied are decided. Integrated values ΣA and ΣC are generated. The integrated value ΣA is corrected in accordance with the comparison result of the integrated value ΣC and the value B, and the corrected integrated value ΣA is set to be the integrated value Σu.
Inventors:
MUGISHIMA KOZO
Application Number:
JP2000380234A
Publication Date:
June 28, 2002
Filing Date:
December 14, 2000
Export Citation:
Assignee:
NEC MICROSYSTEMS LTD
International Classes:
G06F7/50; G06F1/03; G06F7/506; G06F7/68; (IPC1-7): G06F7/50
Attorney, Agent or Firm:
Yosuke Goto (1 person outside)
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