Title:
METHOD FOR DESIGNATING FRAME BUFFER LINEAR ADDRESS
Document Type and Number:
Japanese Patent JP3397709
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To obtain a form designated by a linear memory address while utilizing two-dimensional property by calculating one position in a physical memory and supplying the position and a physical memory offset descriptor to a memory controller.
SOLUTION: A specified byte width value, a base address and the physical address offset descriptor are selected from a virtual linear address(VLA) table 110 based on an address area decided by a comparator 102. The base address (the lower limit value of the address area) is subtracted from a linear address supplied by APT and a local linear address is generated. The local linear address is divided by the byte width value selected from the VLA table 110 so that an X address and a Y address are calculated. Then, the X and Y addresses and the descriptor are used by a graphic memory controller 73 and the physical address corresponding to the position of a frame buffer memory 74 is calculated.
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Inventors:
Joel Dee Buck-Jengler
Application Number:
JP1641999A
Publication Date:
April 21, 2003
Filing Date:
January 26, 1999
Export Citation:
Assignee:
HEWLETT-PACKARD COMPANY
International Classes:
G06T1/60; G06F12/02; G09G5/39; (IPC1-7): G06T1/60
Domestic Patent References:
| JP2123477A | ||||
| JP4263342A |
Attorney, Agent or Firm:
Tsugio Okada