Title:
METHOD FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, AND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3793069
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a low-cost semiconductor device of high quality which operates over a wide range by making it possible to easily design a semiconductor integrated circuit which stably operates over a wide range without placing any burden on a designer.
SOLUTION: A transistor cell 22 is designed which has passive elements, such as a capacitor, an inductor, etc., combined with a transistor. The passive element is so determined that the transistor cell 22 has a flat maximum capable gain characteristic in a desired frequency band. A matching circuit for matching the input/output impedance of the transistor cell is so designed that loss generated by the matching circuit has a flat characteristic to a frequency. A semiconductor integrated circuit is designed by combining the transistor cell and matching circuit which are thus designed with each other.
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Inventors:
Yoshinobu Sasaki
Application Number:
JP2001332994A
Publication Date:
July 05, 2006
Filing Date:
October 30, 2001
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L21/822; G06F17/50; H03F1/42; H01L27/04; H01L27/06; H03F1/56; H03F3/60; (IPC1-7): H03F1/42; H01L21/822; H01L27/04
Domestic Patent References:
| JP2001044448A | ||||
| JP57018104A | ||||
| JP4364082A | ||||
| JP2000312122A | ||||
| JP9121130A |
Attorney, Agent or Firm:
Mamoru Takada
Hideki Takahashi
Takuo Tanida
Hideki Takahashi
Takuo Tanida
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