PURPOSE: To speed up a processing by receiving an operation code and plural specifiers, simultaneously decoding the plural specifies and obtaining information for positioning first and second source operands and a destination operand.
CONSTITUTION: After instruction is decoded an operand processing unit(OPU) 21 purses the operand specifiers and calculates the effective addresses thereof. The operands are fetched from the effective addresses and are supplied to an execution unit 13. The execution unit 13 executes the instruction and writes a result in the destination discriminated by a destination pointer related to the instruction. Whenever the instruction is supplied to the execution unit, the instruction unit transmits a position where the source operand in an execution unit register file can be detected and a micro code dispatch addresses on the position where the result is stored and a set of pointers. Thus, the processing is speeded up.
JIYON II MAAREI
TORIYUUGUBU FUOTSUSAMU
| JPS6160459A | 1986-03-28 |