To reduce the consumption of memory capacity by executing operation for outputting a sine wave value by two times of integral operation.

In a digital integration means 11, a multiplying means 12 multiplies an output from a mulitplying means 10 by ΔT and outputs the multiplied result Y1. A delay means 14 delays the output Y1 of the means 11 by one period of a system clock and outputs the delayed result. An adding means 13 adds the output of the means 12 to the output of the means 14 and outputs the added result as data Yi. The integration of (b) part of the shown equation is executed by the means 11. A digital integration means 15 also is similarly constituted of a multiplying means 16, an adding means 17 and a delay means 18 and executes the integration of the (c) part of the equation. When ω is set up as the initial value Y0 of the data Yi at the start of operation in the constitution, the equation is calculated synchronously with the system clock and an instantaneous value Xi of a sine wave is successively outputted from the means 15. Consequently an analog signal type sine wave can be generated.