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Title:
METHOD AND DEVICE FOR INFERENCE USING HARDWARE
Document Type and Number:
Japanese Patent JPH02144627
Kind Code:
A
Abstract:

PURPOSE: To rapidly execute inference by using data read out from an inference memory as the succeeding address to advance inference, and when a control word for the read data indicates user interface access storing an established fact in a check bit of the inference memory.

CONSTITUTION: When the conclusion part of B is obtained at the time of specifying the address of A, the address of B is specified to obtain the conclusion part of C, so that inference from A to B and B to C can be advanced. In relation between addresses and the number of bits of data, the number of bits for addresses is not increased as compared to an existing inference system and is set up almost to the same value, and when only one condition part and one conclusion part exist, one rule is stored in one address. Since an inference program does not exist by advancing inference by hardware in a CPU, the whole memory capacity of the memory can be used for storing rules, so that rules corresponding to memory addresses can be stored. Thus, rapid inference can be executed.


Inventors:
OKADA ATSUSHI
Application Number:
JP29857888A
Publication Date:
June 04, 1990
Filing Date:
November 25, 1988
Export Citation:
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Assignee:
OKADA ATSUSHI
International Classes:
G06F9/44; G06N5/04; (IPC1-7): G06F9/44
Attorney, Agent or Firm:
Murao Rikio



 
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