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Title:
METHOD FOR FALSE CROSS AND GROUND TEST
Document Type and Number:
Japanese Patent JPS58160869
Kind Code:
A
Abstract:

PURPOSE: To shorten a test time and to simplify program logic, by using a driving switch only at the part of a path to be tested when an electronic exchange which constitute a channel network by using space-division switches a false cross and ground test is executed.

CONSTITUTION: In a main storage device MM, three kind of programs for input, output, and processing are set up. The processing program selects a false cross and ground test device FCGT and a path to be tested and edits information for the connection of the path to be tested. The output program sends a command for the connection of the path to be tested from a central controller CC to an information receiving and distributing device SRD. On receiving this command, the device SRD transmits the command to a channel driving device SC, which drives a corresponding switch to form the test path. Once the connection of the test path is made, the processing program edits information on the starting of the test to the device FCGT. Then, the output program transmits information on relay control from the device CC through the device SRD to a relay driving device RC, which drives a corresponding relay, so that the device FCGT starts the test. After the test, the device TSCN makes a read in response to a command to perform an analysis by the processing program.


Inventors:
OKAZAKI MINORU
TOTOKAWA NORIBUMI
KOU YASUHIRO
Application Number:
JP4168182A
Publication Date:
September 24, 1983
Filing Date:
March 18, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G01R31/02; (IPC1-7): G01R31/02
Attorney, Agent or Firm:
Aoki Akira



 
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