Title:
METHOD FOR FORMING SELF-ALIGNED METALLIC WIRE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2964230
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To improve the contact resistance characteristic and the integration level by preventing the surface area of a contact hole from being reduced due to mis-alignment between the contact hole and a trench.
SOLUTION: In this method, a process where a 1st insulation film 33 is formed on a semiconductor substrate 31 and a 1st conductor layer 35 is formed on the film 33, a process where a 2nd insulation film 37 is formed on the 1st insulation film 33 and the 1st conductor layer 35 and a photosensing film 39 is formed on the film 37, a process where the photosensing film 39 is subject to 1st exposure and development to form a contact hole pattern and a contact hole 41 is formed by etching the 2nd insulation film 37, a process where the photosensing film left after the 1st exposure and development is subject to 2nd exposure and development and a trench pattern of a prescribed shape is formed to a position of including the contact hole 41, a process where a trench 43 is formed by etching a 2nd insulation film, and a process where a 2nd conductor layer 4 is formed by removing the photosensing film are conducted sequentially.
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Inventors:
YUNNKUON JUN
Application Number:
JP18670297A
Publication Date:
October 18, 1999
Filing Date:
July 11, 1997
Export Citation:
Assignee:
ERU JII SEMIKON CO LTD
International Classes:
H01L21/28; H01L21/768; (IPC1-7): H01L21/768
Domestic Patent References:
| JP7254605A | ||||
| JP334423A | ||||
| JP8107143A |
Attorney, Agent or Firm:
Fumio Sasashima (1 person outside)