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Patent Searching and Data


Title:
METHOD OF FORMING SEMICONDUCTOR HETEROJUNCTION
Document Type and Number:
Japanese Patent JPH0427116
Kind Code:
A
Abstract:

PURPOSE: To enable a thin and high-quality epitaxial growth layer to be formed while control ling a growth layer thickness accurately by forming an intermediate layer of a specific sub stance at a temperature which is lower than a growth temperature and then increasing the temperature to a growth temperature before performing the gaseous phase epitaxial growth of a second semiconductor substance.

CONSTITUTION: A single crystal 3 with a second semiconductor substance which is different from a first substance is allowed to the gaseous phase epitaxial growth on a substrate 1 which consists of a first semiconductor single crystal. Before performing the gaseous phase epitaxial growth of the second semiconductor substance, the first substance, the second sub stance, and an organic metal compound or a halogen compound of a substance which is selected from a group consisting of a mixed substance of the first and second substances and a third semiconductor substance which conforms to a crystal of the substrate crystallographically are absorbed onto the substrate surface from the reaction gas of that raw material. At the same time, an intermediate layer 2 of a substance which is selected by thermal degradation reaction of the absorbed substance is formed. After that, after increas ing the temperature to a specified epitaxial growth temperature, the second semiconductor substance is subjected to gaseous phase epitaxial growth onto an intermediate layer from the reaction gas of that raw material.


Inventors:
NAKAI KENYA
Application Number:
JP13115690A
Publication Date:
January 30, 1992
Filing Date:
May 23, 1990
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L21/205; (IPC1-7): H01L21/205
Attorney, Agent or Firm:
Aoki Akira (4 outside)