Title:
半導体層の形成方法
Document Type and Number:
Japanese Patent JP7272506
Kind Code:
B2
Abstract:
A second semiconductor layer is oxidized through a groove and a fourth semiconductor layer is oxidized, a first oxide layer is formed, and a second oxide layer is formed. By oxidizing the entire second semiconductor layer and the fourth semiconductor layer, the first oxide layer and the second oxide layer in an amorphous state are formed.
Inventors:
Ryo Nakao
Sato Toki
Sato Toki
Application Number:
JP2022509318A
Publication Date:
May 12, 2023
Filing Date:
January 20, 2021
Export Citation:
Assignee:
Nippon Telegraph and Telephone Corporation
International Classes:
H01L21/20
Domestic Patent References:
| JP2008542183A | ||||
| JP2010825A | ||||
| JP10321529A | ||||
| JP2016072631A |
Attorney, Agent or Firm:
Shigeki Yamakawa
Yuzo Koike
Masaki Yamakawa
Yasushi Motoyama
Yuzo Koike
Masaki Yamakawa
Yasushi Motoyama
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