Title:
デバイス構造体の製造方法
Document Type and Number:
Japanese Patent JP7375585
Kind Code:
B2
Abstract:
To provide a device structure manufacturing method capable of manufacturing a device structure which includes a layer containing silicon nitride and has a sealing layer capable of suppressing cracks.SOLUTION: In a device structure manufacturing method including a step (a) of preparing a base material and a multi-layered material having an element portion provided on the base material, and a step (b) of forming a sealing layer for sealing the element portion, the step of forming the sealing layer (b) includes a step of forming a first sealing layer (b1) and a step of forming a second sealing layer (b2), the step (b1) of forming the first sealing layer (b1) includes a step (b1-1) of forming a first intermediate layer containing thermoplastic elastomer and a solvent, and a step (b1-2) of drying the first intermediate layer, and the step (b2) of forming the second sealing layer includes a step (b2-1) of forming a second intermediate layer containing a polysilazane compound, and a step (b2-2) of irradiating the second intermediate layer with ultraviolet rays.SELECTED DRAWING: Figure 1
Inventors:
Motofumi Kashiwagi
Application Number:
JP2020015463A
Publication Date:
November 08, 2023
Filing Date:
January 31, 2020
Export Citation:
Assignee:
Nippon Zeon Co., Ltd.
International Classes:
H10K50/844; H10K50/10; H10K59/10; H10K59/40; H10K59/80; H10K59/95; H10K71/12
Domestic Patent References:
| JP2017504174A |
Foreign References:
| WO2019220896A1 |
Attorney, Agent or Firm:
Sakai International Patent Office