Title:
窒化物半導体結晶の製造方法および窒化物半導体結晶基板
Document Type and Number:
Japanese Patent JP7457932
Kind Code:
B2
Abstract:
To provide a method for manufacturing a nitride semiconductor crystal, capable of obtaining a high quality nitride semiconductor crystal having a low dislocation density, and a nitride semiconductor crystal substrate including a high quality nitride semiconductor layer having a low dislocation density.SOLUTION: A method for manufacturing a nitride semiconductor crystal comprises: a first crystal growth step of growing a first semiconductor crystal having an unevenness surface including first depressions in a three-dimensional growth mode having a facet surface on a substrate 10; a first treatment step of treating the unevenness surface into a flat surface by polishing; a second treatment step of forming second depressions by treating a region having dislocations on the flat surfaces by etching; and a second crystal growth step of growing a second semiconductor crystal having a dislocation density lower than that of the first semiconductor crystal so as to cover the second depressions in a two-dimensional growth mode.SELECTED DRAWING: Figure 2
Inventors:
Kei Ohno
Junichi Takino
Tomoaki Sumi
Akio Ueda
Junichi Takino
Tomoaki Sumi
Akio Ueda
Application Number:
JP2019112240A
Publication Date:
March 29, 2024
Filing Date:
June 17, 2019
Export Citation:
Assignee:
Panasonic IP Management Co., Ltd.
International Classes:
C30B29/38; C23C16/18; C23C16/34; C23C16/56; C30B25/20; H01L21/205
Domestic Patent References:
| JP2016103624A | ||||
| JP2000004400A | ||||
| JP2008141005A | ||||
| JP2003142414A | ||||
| JP2018065730A | ||||
| JP2018199593A | ||||
| JP2020075837A |
Attorney, Agent or Firm:
Hiromori Arai
Eisaku Teratani
Shinichi Michisaka
Eisaku Teratani
Shinichi Michisaka