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Patent Searching and Data


Title:
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEPARATING AND ALIGNING JIG
Document Type and Number:
Japanese Patent JP2003179125
Kind Code:
A
Abstract:

To align chips by surely separating the chips one by one.

A method of manufacturing a DHD includes an assembling step of housing the chips 30 formed into square plate-like shapes in the hollow section 11 of a sealed body 10, formed into a cylindrical shape by separating the chips 30 one by one by means of a separating and aligning fig 40. The jig 40 is provided with a plate 44 in which a plurality of square-shaped holding holes 46 having suction ports in their bottom faces is aligned. The length F of one side of each hole 46 is set to satisfy formulae (1) and (2): F<(the minimum size of A or B) + the minimum size of C... Formula (1) F=(the maximum size of A or B)+α... Formula (2) where A, B, and C respectively denote the longitudinal size, the width size, and the thickness of each chip 30. Since the chips 30 can be aligned by separating the chips 30 one by one, by means of the separating and aligning jig 40, a DHD can be prevented from being shipped in a state where two chips 30 are contained in the sealed body 10 of the DHD.


Inventors:
SAITO TOSHINAO
GOMI KAZUMI
Application Number:
JP2001375671A
Publication Date:
June 27, 2003
Filing Date:
December 10, 2001
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L21/683; H01L21/50; H01L21/68; H01L23/48; (IPC1-7): H01L21/68; H01L21/50; H01L23/48
Attorney, Agent or Firm:
Kajiwara Tatsuya