METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Title:

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Document Type and Number:

Japanese Patent JP2011077169

Kind Code:

A

Abstract:

To provide a method for manufacturing a semiconductor device, capable of preventing electric short-circuits between wires which occur, when liquid resin is poured by avoiding contact between wires.

The rectangular principal plane of a semiconductor chip CH has first and second vertexes A1 and A2 on a diagonal line, and first and second sides L1 and L2 connected to the first and second vertexes A1 and A2. A wire WR is formed between an electrode IL and a pad PD of the semiconductor chip CH. The wire WR is stored in a cavity CV of a mold ML. The liquid resin is poured from the first vertex A1 so as to pass along the first and second sides L1 and L2 to the second vertex A2, and then to the inside of the cavity CV. The resin portion is formed by hardening the liquid resin. In a planar view, the formation of the wire WR is made so that it may pass along the side farther from the first vertex A1 against a straight line connecting between the pad PD and the electrode IL.

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Inventors:

SHINKAWA HIDEYUKI

Application Number:

JP2009225056A

Publication Date:

April 14, 2011

Filing Date:

September 29, 2009

Export Citation:

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