Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP2005317715
Kind Code:
A
Abstract:

To provide a method for manufacturing a semiconductor integrated circuit which uses an ink jet coating device.

An ink jet coating device 1 is provided with a stage 6, an application head unit 8, and a control unit. In the stage 6, application material in which silica was mixed in solvent can be moved into an arbitrary direction by a table which moves on a rail laid on a horizontal plane, rotation movement is enabled by a table which rotates by using an axis of rotation as a center, and a wafer 15 is held to which the application material is to be applied. The application head unit 8 is provided with an ink jet head 12 which is fixed above the stage 6 and equipped with an actuator in which a plurality of nozzles 13 are arranged at column and which makes every nozzle 13 jet the application material, and the unit 8 applies the application material to the wafer 15. The control unit controls application of the application material and movement of the stage. By using the ink jet coating device 1, ink jet application of the application material is performed from the application head unit 8 to the wafer 15 in which trenches were prepared on a surface, the inside of the trench is filled with silica, and an insulating layer is formed.


Inventors:
ISHIHARA HARUHIKO
HARADA TANEMASA
SATO TSUYOSHI
ISOGAWA MASAKUNI
Application Number:
JP2004133153A
Publication Date:
November 10, 2005
Filing Date:
April 28, 2004
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
TOSHIBA CORP
International Classes:
B05D1/26; B05D7/00; H01L21/31; H01L21/336; H01L29/78; (IPC1-7): H01L21/31; B05D1/26; B05D7/00; H01L21/336; H01L29/78
Attorney, Agent or Firm:
Hidekazu Miyoshi
Iwa Saki Kokuni
Kawamata Sumio
Nakamura Tomoyuki
Masakazu Ito
Shunichi Takahashi
Toshio Takamatsu