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Title:
METHOD FOR MANUFACTURING THIN FILM TRANSISTOR AND FOR DISPLAY DEVICE
Document Type and Number:
Japanese Patent JP2005072443
Kind Code:
A
Abstract:

To obtain a method for manufacturing a thin film transistor having no protrusion on the peripheral edge of a semiconductor layer, because there is a problem that protrusions on the semiconductor layer which exist along the pattern peripheral edge of the semiconductor layer may become leak current routes in the thin film transistor of a display device, and thereby adverse effects may be exerted on display quality.

After etching for the island-like processing of a semiconductor layer 4 and an ohmic layer 5, ashing is performed by using mixed gas composed of gas containing fluorine elements and oxygen gas. Since the gas containing fluorine elements is used in addition to the oxygen gas, fine etching reaction is generated in ashing, so that an effect for removing re-attached components such as deposited reactants and resists heavily stuck to a treated substrate surface at the time of etching, particularly to the edge of an area coated with the resist is displayed. Since almost all the ashing gas composed of oxygen gas, the formation of an alteration layer such as the generation of a new deposited reactant caused by the ashing itself is extremely rare.


Inventors:
SHIBATA EIJI
Application Number:
JP2003302732A
Publication Date:
March 17, 2005
Filing Date:
August 27, 2003
Export Citation:
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Assignee:
ADVANCED DISPLAY KK
International Classes:
H01L21/3065; H01L21/336; H01L29/786; (IPC1-7): H01L21/336; H01L21/3065; H01L29/786
Attorney, Agent or Firm:
Ken Ieiri



 
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