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Title:
METHOD FOR PATTERNING ORGANIC SEMICONDUCTOR MATERIAL LAYER, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, METHOD FOR PATTERNING ELECTROLUMINESCENT ORGANIC MATERIAL LAYER, MANUFACTURING METHOD OF ORGANIC ELECTROLUMINESCENCE DISPLAY DEVICE, METHOD FOR PATTERNING CONDUCTIVE POLYMER LAYER, AND METHOD FOR FORMING WIRING LAYER
Document Type and Number:
Japanese Patent JP2006156752
Kind Code:
A
Abstract:

To provide a manufacturing method of semiconductor device which does not cause deterioration of the characteristic of an organic semiconductor material layer in the case of patterning the organic semiconductor material layer based on a lift-off method.

The manufacturing method of the semiconductor device forms a masking layer 32 having an inverse pattern on substrates 13 and 14 and thereafter, forms the organic semiconductor material layer 15A on the exposed substrates 13 and 14 and the mask layer 32. Next, after removing the mask layer 32 and the organic semiconductor material layer 15A on it, the method carries out baking treatment of the organic semiconductor material layer 15A to form a channel forming area consisting of the organic semiconductor material layer 15A.


Inventors:
HIRAI CHOICHI
HARNACK OLIVER
Application Number:
JP2004345907A
Publication Date:
June 15, 2006
Filing Date:
November 30, 2004
Export Citation:
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Assignee:
SONY CORP
SONY INT EUROPE GMBH
International Classes:
H01L21/336; G09F9/00; H01L29/786; H01L51/05; H01L51/50; H05B33/10; H05B33/26
Attorney, Agent or Firm:
Takahisa Yamamoto



 
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