Title:
METHOD OF PLATING CONDUCTIVE LAYER ON CIRCUIT SUBSTRATE
Document Type and Number:
Japanese Patent JPS5257972
Kind Code:
A
Inventors:
POURU ETSUCHI HOROUEI
DONARUDO EMU MATOTSUKUSU
JIERARUDO SHII NERUSON
DONARUDO EMU MATOTSUKUSU
JIERARUDO SHII NERUSON
Application Number:
JP13117376A
Publication Date:
May 12, 1977
Filing Date:
October 29, 1976
Export Citation:
Assignee:
US GOVERNMENT
International Classes:
H05K3/14; H01L21/48; H01L23/498; H05K3/38; (IPC1-7): H05K3/00; H05K3/10