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Title:
METHOD FOR SYNCHRONIZING EXECUTION OF INSTRUCTION STREAM FOR TEST OF SEQUENCING MEANS IN DATA PROCESSING NETWORK
Document Type and Number:
Japanese Patent JPH03222057
Kind Code:
A
Abstract:

PURPOSE: To facilitate complete confirmation by turning one of plural processors to a master (ME), turning the others to slaves (SE), maintaining the SEs in a holding state (SS) by the ME, then turning the ME to the SS as well, then simultaneously releasing the ME and SEs from the SS and executing a synchronization instruction.

CONSTITUTION: When the synchronization instruction is executed by the respective processors PR 18, 20 and 22, the PR 22 which executes the synchronization instruction last is turned to the master device and the PRs 18 and 20 are turned to the slave devices. The PR 22 maintains the PRs 18 and 20 in the holding state for tentatively stopping the execution thereafter of a program instruction PO and turns the PR 22 itself to the holding state as well. When the master device executes the synchronization instruction once, communication is performed with the other slave devices and the execution of an instruction stream is continued. At the time, the horizontal microcode of the respective PRs executes an operation end instruction, the restart time points of the respective PRs are aligned and simultaneously released and the restart of the execution of the PO is made possible simultaneously with it. Thus, it is completely and easily confirmed that a serializing means is made to correctly function.


Inventors:
DAIAN REESHII NIPUFUAA
RIN AREN MAKUMAHON
SHIYAAROTSUTO BENETSUTO METSUT
Application Number:
JP33343290A
Publication Date:
October 01, 1991
Filing Date:
November 29, 1990
Export Citation:
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Assignee:
IBM
International Classes:
G06F15/16; G06F9/45; G06F9/52; G06F15/177; G06F15/80; (IPC1-7): G06F15/16
Attorney, Agent or Firm:
Koichi Tonmiya