Title:
METHOD FOR TESTING OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS594133
Kind Code:
A
Abstract:
PURPOSE:To enable to perform a high speed and highly efficient automatic testing by a method wherein a selection is performed in succession and separately for each rotation stopping position of an intermittent rotating device on the loading, testing and results of testing on the semiconductor device to be tested. CONSTITUTION:An IC, on which only one pieced is escaped by an escapement mechanism 16, is put into a 90-degree direction converting guide rail 17 and the direction of said IC is converted. When a rotary head 15 stops after it has been rotated by 90 degrees while the above-mentioned operation is being performed, the IC in the guide rail which has been direction-converted by 90 degrees by a loading pusher is pushed down to 0 deg.C, in other words said IC is loaded in the chuck 14 which is brought to the position of A, the chuck 14 which is moved to the position of 90 degrees, position B in other words, is pushed down and it performs a contacting operation. At the position of 180 degrees, position C in other words, an unsatisfactory IC is picked out, it passes through the guide rail inserted into an unsatisfactory IC storing case. A satisfactory IC which came from the chuck 4 in the position of 270 degrees, which is D position in other words, is passed through the guide rail by the air pusher 30, and inserted into a satisfactory IC storing case 32.
Inventors:
TATEISHI MASARU
Application Number:
JP11314582A
Publication Date:
January 10, 1984
Filing Date:
June 30, 1982
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
G01R31/26; H01L21/66; (IPC1-7): G01R31/26; H01L23/00
Domestic Patent References:
| JPS5762600A | 1982-04-15 | |||
| JPS5441173U | 1979-03-19 |
Attorney, Agent or Firm:
Motoki Hisagi (1 outside)
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