Title:
磁気記憶素子接合及び磁気記憶素子接合を形成するための方法
Document Type and Number:
Japanese Patent JP2006520105
Kind Code:
A
Abstract:
A method for patterning a magnetic memory cell junction is provided herein, which includes etching exposed portions of a stack of layers to a level spaced above a tunneling barrier layer of the stack of layers. In addition, the method may include implanting dopants into exposed portions of the stack of layers. For example, the method may include oxidizing and/or nitriding the exposed portions of the stack of layers. In some embodiments, the steps of etching and implanting dopants may form an upper portion of the magnetic cell junction. Alternatively, the method may include alternating the steps of etching and implanting dopants throughout the thickness of the exposed portions of the stack of layers. In either case, the stack of layers may include a magnetic layer which includes a material adapted to prevent the introduction of dopants underlying the tunneling barrier layer during the step of implanting.
Inventors:
Chen, Eugene, Wye
Camellia, camel
Kula, Whittle
Wolfman, Jerome S
Camellia, camel
Kula, Whittle
Wolfman, Jerome S
Application Number:
JP2006508938A
Publication Date:
August 31, 2006
Filing Date:
March 02, 2004
Export Citation:
Assignee:
Silicon Magnetic Systems
International Classes:
H01L27/105; H01L21/00; H01L21/8239; H01L21/8246; H01L27/22; H01L29/82; H01L43/08; H01L43/12; G11C
Attorney, Agent or Firm:
Masaki Yamakawa
Shigeki Yamakawa
Shigeki Yamakawa