Title:
マイクロチャネルプロセス装置
Document Type and Number:
Japanese Patent JP5922137
Kind Code:
B2
Abstract:
This invention relates to an apparatus, comprising: a plurality of plates in a stack defining at least one process layer and at least one heat exchange layer, each plate having a peripheral edge, the peripheral edge of each plate being welded to the peripheral edge of the next adjacent plate to provide a perimeter seal for the stack, the ratio of the average surface area of each of the adjacent plates to the average penetration of the weld between the adjacent plates being at least about 100 cm2/mm. The stack may be used as the core assembly for a microchannel processor. The microchannel processor may be used for conducting one or more unit operations, including chemical reactions such as SMR reactions.
Inventors:
Tonkovic, Anna, Lee
Ushack, Thomas
Jaroche, Kai Todd Paul
Nigle, paul
Yang, Bin
Arora, Ravi
Marco, Jeffrey
Marco, Jennifer
Yang, Barry, Elle.
Munding, andrea
Campe, Sara
Ushack, Thomas
Jaroche, Kai Todd Paul
Nigle, paul
Yang, Bin
Arora, Ravi
Marco, Jeffrey
Marco, Jennifer
Yang, Barry, Elle.
Munding, andrea
Campe, Sara
Application Number:
JP2013534999A
Publication Date:
May 24, 2016
Filing Date:
October 18, 2011
Export Citation:
Assignee:
Verosis, Inc.
International Classes:
B01J19/00; B01J35/02; B81B1/00; B81C3/00; C01B3/38; C07B61/00; F28F3/04
Domestic Patent References:
| JP2009125735A | ||||
| JP2007296495A | ||||
| JP2009202130A | ||||
| JP2010201429A | ||||
| JP2004285187A | ||||
| JP2009274927A |
Foreign References:
| US20050087767 | ||||
| WO2006052615A1 |
Attorney, Agent or Firm:
Patent Business Corporation Daiichi International Patent Office