To prevent unnecessary electric power from being consumed owing to operation based upon an unnecessarily fast system clock while preventing the operation speed of the microcomputer from decreasing owing to a time lag.

When plural kinds of standby mode resetting factor are generated, a standby mode controller 3 resets a standby mode. At the same time, a signal output means 4 switches an output signal according to a standby mode resetting factor. Then a clock selector 5 selects an arbitrary output clock out of input clocks according to the output signal from the signal output means 4 and outputs it.