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Title:
モールド貫通ビアを有する成形領域を有するマイクロ電子コンポーネント
Document Type and Number:
Japanese Patent JP7458969
Kind Code:
B2
Abstract:
Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic component may include a substrate having a first face and an opposing second face, wherein the substrate includes a through-substrate via (TSV); a first mold material region at the first face, wherein the first mold material region includes a first through-mold via (TMV) conductively coupled to the TSV; and a second mold material region at the second face, wherein the second mold material region includes a second TMV conductively coupled to the TSV.

Inventors:
Sanka Ganesan
Ram Viswanath
Xavier François Brun
Tarek A. Ibrahim
Jason M. Gamba
Mannish Dubby
robert alan may
Application Number:
JP2020209276A
Publication Date:
April 01, 2024
Filing Date:
December 17, 2020
Export Citation:
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Assignee:
Intel Corporation
International Classes:
H01L23/12; H01L23/14; H01L25/04; H01L25/18
Domestic Patent References:
JP2014179613A
JP2004079658A
JP2008261311A
Foreign References:
WO2020021402A1
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Osamu Miyazaki