To improve the throughput of a microprocessor by reducing the number of cycles needed to access an external bus and increasing the use efficiency of a system bus.

The microprocessor having a bus master and the system bus has an external bus interface having an interface function between the external bus connected to an external memory and the system bus. The external bus interface has a batch read control part (1) for repeating external bus access according to a batch read address in response to a batch read instruction from the bus master, reading data from the external memory and storing the data in a buffer, and an access switching part (2) for outputting the data stored in the buffer to the system bus without performing external bus access in response to a normal read instruction from the bus master after the batch read operation when a normal read address is the batch read address.