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Patent Searching and Data


Title:
MICROPROCESSOR SYSTEM
Document Type and Number:
Japanese Patent JPH03256127
Kind Code:
A
Abstract:

PURPOSE: To use a slow ROM as a program ROM and to improve the performance of a system by providing this system with a direct memory access (DMA) mechanism, and at the time of resetting the system, writing the program of the ROM in a high-speed RAM.

CONSTITUTION: When a system reset signal is applied, a microrpocessor (MP) 1 is held at a reset state, and when a reset signal is released, the program stored in the slow program ROM 4 is written in the high-speed program RAM 3 while holding the MP 1 at the reset state as it is. After ending the writing operation, the reset state of the MP 1 is released and the DAM mechanism 2 is disconnected from the MP 1. After releasing the reset state, the MP 1 fetches the program stored in the RAM 3 and rises. Since the slow-speed ROM with low cost and large capacity can be used as the program ROM, the system of high performance can be obtained.


Inventors:
ITAYA SHIGERU
Application Number:
JP5374690A
Publication Date:
November 14, 1991
Filing Date:
March 07, 1990
Export Citation:
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Assignee:
MITSUBISHI HEAVY IND LTD
International Classes:
G06F9/445; G06F13/00; (IPC1-7): G06F9/445; G06F13/00
Attorney, Agent or Firm:
Takehiko Suzue (3 outside)