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Patent Searching and Data


Title:
MICROPROGRAM CONTROL DATA PROCESSOR
Document Type and Number:
Japanese Patent JPS5559546
Kind Code:
A
Abstract:

PURPOSE: To eliminate the waste on the control memory through the processing of the data supplied discretely by providing the restart RST pulse so that the process can be started from the next address position at the restarting time via the wait order.

CONSTITUTION: For the data process system through the RAM and microporgram μPG, the WAIT order is prepared at the end of section process programs 1-1, 1-2... each which perform the process to the input data and on control memory 1 which stores μPG, and subsequent addresses l+1, m+1... to the WAIT order are defined as the dummy addresses. When the section process program is executed, the wait order is executed automatically to discontinue the data process. The advancing of the μPG counter is permitted the RST pulse coinciding with the timing when the next new input data arrives, and the control is given so that the section process program may be executed in accordance with the next input data. Thus the process in which the discrete input is processed in a short time and then discontinuted can be carried out with no waste of the control memory.


Inventors:
UMIGAMI SHIGEYUKI
MURANO KAZUO
AMANO FUMIO
ITOU YASUKAZU
Application Number:
JP13222478A
Publication Date:
May 06, 1980
Filing Date:
October 27, 1978
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F9/22; G06F3/00; G06F9/26; G06F9/46; G06F9/48; H04B3/04; (IPC1-7): G06F3/00; G06F3/04; G06F9/22; G06F9/46