PURPOSE: To cause no contradiction of the contents of a control memory and an address array even if a fault is generated in a processor, by writing the control information which sets a V bit to "1" only when writing to the last word of a unit data block.

CONSTITUTION: When the upper bit of an address register 2 does not coincide with a block address in control information read out of an address array 7, or a V bit is "0", a write control circuit 1 reads out a micro-instruction belonging to an object data block from a main memory 6 and sets it to a buffer 102, and sets a write address to a counter 100. Also, said circuit sets the contents of the buffer 102, the contents of the counter 100, and new control information to a control memory write data register 4, the register 2, and an address array write data register 3, respectively, and writes a data. A V bit which is set to "1" only when writing to the last word of a unit data block is detected by a decoder 101, and written as control information.