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Title:
MODE SWITCHING SYSTEM FOR DYNAMIC TYPE SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JPH023145
Kind Code:
A
Abstract:

PURPOSE: To obtain a special mode of which control of an external signal is easy by giving a level higher than a supply voltage and the level less than the supply voltage to plural specific terminals and switching to the optical mode.

CONSTITUTION: A signal inputted to an address terminal is inputted to an address buffer 21 and is given to one of Super Vcc detecting circuits 11, 12...1n at the same time. The threshold voltage of the circuits is Vtn and K is set so that the electric potential of a node N1 may become the threshold voltage of an inverter 105 when the voltage impressed to an address input terminal is over KVtn and becomes more than Vcc+α. Thus, when the voltage more than Vcc+α is impressed to the input terminal, the one of the circuit 11...1n generates a detecting signal Ai (i=1,2...n). For the signal Ai, a code is decoded with a decoder 20, and a special mode authorized signal Mi is generated from a special mode authorized generating circuit 30. Besides, when the input voltage is less than a supply voltage, it becomes a test mode.


Inventors:
KONISHI YASUHIRO
KUMANOTANI MASAKI
Application Number:
JP14430988A
Publication Date:
January 08, 1990
Filing Date:
June 10, 1988
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G11C11/401; G11C11/34; G11C29/00; G11C29/14; H01L21/8242; H01L27/10; H01L27/108; (IPC1-7): G11C11/34; G11C11/401; H01L27/10; H01L27/108
Attorney, Agent or Firm:
Masuo Oiwa (2 outside)



 
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