Title:
MODEM WITH BIT INTERLEAVING FUNCTION FOR DIGITAL MULTIPLE RADIO SYSTEM
Document Type and Number:
Japanese Patent JP3313394
Kind Code:
B2
Abstract:
PURPOSE: To perform the appropriate demodulation of signals at a demodulator by flattening out spectrums of signals outputted after bit interleaving processing at a modulator.
CONSTITUTION: A modulator 51 outputs modulated signals after inserting auxiliary signals S supplied from the outside to the overhead parts of plural data frames inputted in parallel from the outside, performing the bit interleaving processing, and further by performing the modulation with a prescribed frequency carrier. The modulated signal is demodulated at a demodulator, and the plural numbers of data inputted to the modulator 51 is obtained. When the auxiliary signals S are supplied, the auxiliary signals S are outputted to the modulator 51. When the auxiliary signals S are interrupted, the detection of the interruption is performed, and an auxiliary signal generating means 41 to output the arbitrarily varying signals to the modulator 51 at the time of this interruption detection is connected to the modulator 51. Thus, even when the auxiliary signals S are interrupted, the substituted signals are inserted to the overhead parts, so that the spectrums of the modulated signals outputted from the modulator 51 are flattened.
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Inventors:
Yoshitami Aono
Toshiyuki Takizawa
Satoshi Aikawa
Toshiyuki Takizawa
Satoshi Aikawa
Application Number:
JP10339792A
Publication Date:
August 12, 2002
Filing Date:
April 23, 1992
Export Citation:
Assignee:
富士通株式会社
日本電信電話株式会社
日本電信電話株式会社
International Classes:
H04L1/00; H03M13/27; H04L27/36; H04L27/38; (IPC1-7): H04L27/36; H03M13/27; H04L1/00; H04L27/38
Other References:
【文献】特許3117539(JP,B2)
Attorney, Agent or Firm:
Akira Matsumoto