Title:
MODULATOR
Document Type and Number:
Japanese Patent JP3260874
Kind Code:
B2
Abstract:
PURPOSE: To make a fast arithmetic operation possible and to save on power consumption by simplifying a circuit without providing a transmission power control circuit separately.
CONSTITUTION: A modulator which controls a transmission power in the rise and fall time of data when it is transmitted by a burst signal is equipped with memory circuits 17 which store data in which the impulse response coefficient of a FIR filter is multiplied by and added on input data at every data inputted to the FIR filter at every stationary state and rise or fall state of data, and a control circuit 16 which outputs selectively the data at every state of the memory circuit corresponding to the burst signal. In other words, the data in which the impulse response coefficient of the FIR filter is multiplied by the input data to the FIR filter is stored in the memory circuit 17 at every rise, stationary, and fall time and the data is outputted selectively by the control circuit 16. Therefore, no multiplier is used, which simplifies the circuit.
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Inventors:
Kazunari Sawada
Tamotsu Nagashima
Tamotsu Nagashima
Application Number:
JP34922592A
Publication Date:
February 25, 2002
Filing Date:
December 28, 1992
Export Citation:
Assignee:
Asahi Kasei Microsystem Co., Ltd.
International Classes:
G06G7/16; H03C3/00; H03H17/02; H03H17/06; H03H21/00; H04L27/20; (IPC1-7): H04L27/20
Domestic Patent References:
| JP59132267A | ||||
| JP4323932A | ||||
| JP3235553A | ||||
| JP4239245A | ||||
| JP6205056A | ||||
| JP6205057A | ||||
| JP6205058A |
Attorney, Agent or Firm:
Kazuo Watanabe