PURPOSE: To reduce the power consumption by providing one field effect semiconductor device of the 2nd conductor type to which an inverting signal of a clock signal line is impressed to each gate electrode.

CONSTITUTION: The level of bus signal lines 1∼8 is pulled up by MOS transistors (TRs) T1∼T8 at a precharge period and parasitic capacitors C1∼C8 are charged. In this case, the level of the bus signal lines 1∼8 reaches a power supply voltage Vcc lowered by a threshold voltage Vth. The discharged parasitic capacitors C3, C6, C7 at the next precharge period are charged from a path through pull-up TRs T3, T6, T7, a path of series connection of TRs T2, T12, a path of the series connection of TRs T4, T13 or a path of the series connection of TRs T1, T11 and T12. Thus, the time required to discharge the electric charge of the bus signal lines is short and the power consumption is low.