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Title:
MULTI-BUS CONTROLLER
Document Type and Number:
Japanese Patent JP2000267992
Kind Code:
A
Abstract:

To perform data transfer at a state that a priority order is surely secured irrespective of whether requests are 'data transfer between buses' or 'data transfer in a bus' by efficiently performing data transfer of plural requests.

The data transfer executing part 33 is made to execute data transfer of all the requests in parallel when transfer destination buses of plural requests are not conflicted and a processing is held in a transfer destination bus judging part 30 when the transfer destination buses are conflicted by a confliction of transfer destination bus judging part 20 in a multi-bus mediating circuit 10 of this multi-bus controller. The priority orders of priority order parameters 38ai for request about plural requests are compared, an instruction is given to a cancellation processing part 34 to return cancellation to a bus mediating circuit to make a low-ordered request and an instruction for execution is given to a data transfer executing part 33 to make it execute data transfer of a high-ordered request by a priority order of request judging part 31 in the transfer destination bus judging part 30.


Inventors:
MOCHIZUKI SHUJI
Application Number:
JP6835999A
Publication Date:
September 29, 2000
Filing Date:
March 15, 1999
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F15/173; G06F13/362; G06F13/38; (IPC1-7): G06F13/362; G06F13/38; G06F15/173
Attorney, Agent or Firm:
Kazuhide Okada