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Patent Searching and Data


Title:
MULTI-PROCESSOR SYSTEM
Document Type and Number:
Japanese Patent JP2001125875
Kind Code:
A
Abstract:

To quickly inspect the state of each processor without making it necessary to arrange any extremely complicate electric wiring, or interrupting inter-processor data communication.

In this multi-processor system, 16 processors P0-P15 constituting a multiprocessor system 100 are circularly connected through a ring data bus 102, and grouped with each cluster constituted of four processors as a unit. Each cluster is constituted so that state information outputted from the first to third processors can be inputted to the fourth processor, and that the state information on which the states of all the processors in the same cluster are reflected can be outputted from the fourth processor. Also, the mutually adjacent clusters are constituted so that the state information outputted from the fourth processor in the cluster in the previous stage can be inputted to the first processor in the cluster in the next stage. Thus, it is possible to obtain the state information on which the states of all the processors are reflected by propagating the state information across the clusters.


Inventors:
KUROISHI NORIHIKO
SHIMADA TOSHIRO
UEDA YUTAKA
MIYAGAWA NOBUAKI
KOYANAGI MITSUMASA
Application Number:
JP30843899A
Publication Date:
May 11, 2001
Filing Date:
October 29, 1999
Export Citation:
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Assignee:
FUJI XEROX CO LTD
KOYANAGI MITSUMASA
International Classes:
G06F15/173; G06F9/46; G06F15/16; G06F15/177; G06F15/80; (IPC1-7): G06F15/177; G06F9/46; G06F15/16
Attorney, Agent or Firm:
Atsushi Nakajima (3 outside)